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Power-efficient Convolutional Neural Network (CNN) Hardware Accelerators

The increasing complexity exhibited by Convolutional Neural Networks

Start Wed, Oct 28
End Wed, Oct 28
47,834

THE ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT
CORDIALLY INVITES YOU TO ATTEND
Power-efficient Convolutional Neural Network (CNN) Hardware Accelerators

The increasing complexity exhibited by Convolutional Neural Networks (CNNs) has necessitated the institution of Multiply-Accumulate (MAC) operations capable of performing millions of operations per second. Performing these computationally intensive operations on battery constrained devices, like mobile phones, is one of the motivating factors for power efficient computation of CNNs.

  • Participate and join as we explore the key ideas used for improving the power and performance of CNN acceleration.
  • Learn about the techniques used for zero-skipping at kernel and feature map level.
  • Learn about fixed-point representation schemes, memory hierarchy, and data traversal methods used for obtaining better Tera Operations per second per Watt for CNN Inference.


With Guest Speaker
Dr. Pramod Udupa
Senior Member, IEEE
B.E. degree in electronics and communication engineering Visvesvaraya Technological University, India, 2006
M.E. degree in microelectronics BITS Pilani, Pilani, India, 2008
Ph.D. degree in VLSI for digital signal processing INRIA, France, 2014

Dr. Udupa has worked on 4G systems as a Design Engineer and IP Logic Design Engineer. He is currently a Staff Engineer at the Samsung Advanced Institute of Technology, SRI-B, Bengaluru, and has published over 30 articles in IEEE journals and conferences.

Registration: https://us02web.zoom.us/meeting/register/tZArcemqrzorGNw2S0exLzhZY3A-t74K3e-x